c 2 Quad Q9100 specifications
General information
Type
CPU / Microprocessor
Market segment
Mobile
Family
CPU part number
AW80581GH051003 is an OEM/tray microprocessor
Frequency ?
2267 MHz
Bus speed ?
1066 MHz
Clock multiplier ?
8.5
Socket P
S-spec numbers
Architecture / Microarchitecture
Microarchitecture
c
Platform
Montevina
MontevinaPlus
Processor c ?
Penryn
c stepping ?
E0 (QGMU, SLB5G)
CPUIDs
67A (QGMU)
1067A (SLB5G)
Manufacturing process
0.045 micron
Data width
64 bit
The number of CPU cores
4
The number of threads
4
Floating Point Unit
Integrated
Level 1 cache size ?
4 x 32 KB 8-way set associative instruction caches
4 x 32 KB 8-way set associative write-back data caches
Level 2 cache size ?
Shared 2 x 6 MB 24-way set associative caches
Multiprocessing
Uniprocessor
Extensions and Technologies
MMX instructions
SSE / Streaming SIMD Extensions
SSE2 / Streaming SIMD Extensions 2
SSE3 / Streaming SIMD Extensions 3
SSSE3 / Supplemental Streaming SIMD Extensions 3
SSE4.1 / Streaming SIMD Extensions 4.1 ?
NX / XD / Execute disable bit ?
VT / Virtualization technology ?
Dual Dynamic Acceleration ?
Low power features
C1/AutoHALT, C1/MWAIT, C2, C3 and C4 c states
Stop Grant mode ?
Sleep mode ?
Deep Sleep mode ?
Deeper Sleep mode ?
FSB low-power enhancements
Enhanced / technology ?
Integrated peripherals / components
Integrated graphics
None
Electrical / Thermal parameters
V c ?
0.9V - 1.25V
Minimum/Maximum operating temperature ?
0°C - 100°C
Minimum/Maximum power dissipation ?
16.54 Watt (Deeper Sleep mode) / 74.35 Watt
Thermal Design Power ?
45 Watt
Notes on c 2 Quad Q9100
Bus frequency is 266 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 1066 MHz
Processor operates at 0.85 Volt - 1.1 Volt in Low Frequency mode